Embedded Memories for Nano-Scale VLSIs by Kevin Zhang

Author:Kevin Zhang
Language: eng
Format: epub
Publisher: Springer US, Boston, MA

6.2 Embedded Flash Memory Technology

This section gives an overview of the evolution of embedded-specific flash memory technology, aside from large-scale discrete flash memory. Focus is on the floating-gate devices from 1Tr to split-gate and 2Tr cell structures and how charge-trapping structures such as SONOS technology improves the properties of floating-gate technology to support embedded uses, and foresees the future trends in scalability and functionality for embedded flash memory.

Currently most widely used embedded nonvolatile memories are ROM technologies as classified in Fig. 6.17. EPROM, EEPROM, and flash memory utilizing either a floating-gate or a charge-trapping technology are the most practical devices at present. “Flash memory” is one kind of EEPROM originally named after the flash erasure operation in a sector, a large block of bit cells (of the order of K bits), at one time to enhance the performance in bulk rewrite due to the structural restrictions in high-density cell arrays. On the contrary, EEPROM often refers to a property of byte-wide program/erase. In this section “embedded flash memory” is referred to broadly in the sense of alterable embedded nonvolatile memory constructed by Si/SiOx/SiN/poly-silicon systems regardless of how the erasure function is operated, for convenience of notation.

Fig. 6.17Embedded flash memory and related devices

Download

Copyright Disclaimer:
This site does not store any files on its server. We only index and link to content provided by other sites. Please contact the content providers to delete copyright contents if any and email us, we'll remove relevant links or contents immediately.