Energy-Efficient Smart Temperature Sensors in CMOS Technology by Kamran Souri & Kofi A.A. Makinwa

Energy-Efficient Smart Temperature Sensors in CMOS Technology by Kamran Souri & Kofi A.A. Makinwa

Author:Kamran Souri & Kofi A.A. Makinwa
Language: eng
Format: epub
Publisher: Springer International Publishing, Cham


Given the reduced output signal swing, the OTA of a zoom-ADC does not slew and so its settling follows a single pole response. In this case, incomplete settling only results in a fixed gain error in the integrator. As long as this error does not significantly alter the loop filter’s transfer function, the modulator’s performance will not be impaired.

3.3.5.5 DAC Mismatch

As shown in Fig. 3.7, the proposed zoom-ADC’s modulator uses a 1-bit quantizer, and so its linearity is not limited by quantizer offset and offset spread. However, the ADC’s overall linearity is limited by the nonlinearity of its multi-bit DAC, which is caused by the mismatch of the various DAC elements, e.g., the mismatch between the unit capacitors of a unary-weighted capacitor DAC (CDAC). As in other two-step ADC structures, this mismatch could result in ADC nonlinearity. The standard metric to evaluate this is to measure the ADC’s integral nonlinearity (INL) and differential nonlinearity (DNL). While INL is considered as the error with respect to a best linear-fit, DNL reflects the discontinuities in the ADC’s transfer function.

Although the resulting nonlinearity can be improved by calibration and/or trimming of the DAC references, the associated calibration time significantly increases production costs, thus prohibiting the use of such techniques for large volume production. A suitable solution would be to apply DEM to the unit elements of the multi-bit DAC. During the fine conversion phase, a subset of DAC elements which form the -ADC’s references can be dynamically interchanged, thus averaging out their mismatch. The simulation model of Fig. 3.15 can be used to investigate the effect of the mismatch between the unit elements of the feedback DAC. Figure 3.18, top, shows the simulated INL or temperature error of a 1st-order zoom-ADC with the random mismatch of the feedback DAC, assuming a normal distribution with mean = 0 and σ = 1%. As shown, the resulting temperature errors can be as high as ± 0. 2 ∘C, which is unacceptably large for precision applications. Applying DEM will improve the accuracy to ± 0. 02 ∘C, representing a 10× improvement as shown in Fig. 3.18, bottom.

Fig. 3.18Simulated temperature error in the 1st-order zoom-ADC, assuming a mismatch with normal distribution (zero mean and σ = 1%) between the DAC elements: before (top) and after (bottom) applying DEM ()



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