On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits by unknow

Author:unknow
Language: eng
Format: epub, pdf
Publisher: Springer International Publishing, Cham

Fig. 3.9Comparison of simulated transient current waveforms for SiGe SCRs under 30 V amplitude, 5 ns pulse width, 0.1 ns rise pulse

Fig. 3.10Simulated hole current density contours of a SCR1, b SCR2, and c SCR3

Table 3.3Summary of transient parameters obtained from measurement and simulation under vfTLP stress

Device

SCR1

SCR2

SCR3

P PLUG Existence

N

Y

Y

Effective PNP base width (µm)

1.9

1.2

2.2

Peak voltage (V): measured

24.61

13.91

15.65

Peak voltage (V): simulated

24.16

13.64

17.82

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