Architecting High-Performance Embedded Systems by Jim Ledin

Author:Jim Ledin [Jim Ledin]
Language: eng
Format: epub
Publisher: Packt Publishing
Published: 2021-02-04T16:00:00+00:00

If there are no errors reported, this completes the first stage of the oscilloscope FPGA development project. Although we have not implemented any logic related to our ADC interface yet, the current design is capable of booting and running a software application.

Follow these steps to create and run the code for the TCP echo server:

In Vivado, select File | Export | Export Hardware…. Select the Fixed Platform type, then click Next.

In the Output dialog, select the Include Bitstream option and click Next.

In the Files dialog, select the directory C:/Projects/oscilloscope-software and click Next. Click Finish to complete the export.

Locate the desktop icon titled Xilinx Vitis 2020.1 (or look for your version number, if different) and double-click it.

Select the C:\Projects\oscilloscope-software directory for your workspace and launch Vitis:

Figure 5.11 – Vitis workspace selection dialog

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