Semiconductor Memory Devices and Circuits by Yu Shimeng;

Semiconductor Memory Devices and Circuits by Yu Shimeng;

Author:Yu, Shimeng; [Yu, Shimeng]
Language: eng
Format: epub
Publisher: Taylor & Francis Group
Published: 2022-03-02T00:00:00+00:00


4.3.4 NAND Flash Translation Layer

Due to the unique features of page-based program/read and block-based erase, the NAND Flash is not a random access memory. The program is sequentially performed from one page to the next page within a block, while the erase is done for the entire block. This means that the entire block should start with all cells in the erased states (all “1”s), then program operation will write a page with certain strings to “0”s and remain the rest at “1”s depending on the data pattern that is to be stored. A write pointer is used to label the current page that is being selected. The write pointer will move sequentially page by page in a selected block (i.e., from page 0 to page 63) and this order cannot be reversed, or the pointer cannot jump from one block to another block if it does not reach the last page (i.e., page 63). Hence, a mapping relationship exists from the logic block address (LBA) that is seen by the host to the actual physical page address in NAND Flash. In the NAND controller, there is a Flash translation layer (FTL) that serves as a logbook to record such mapping and additional information about the physical blocks. Figure 4.25 shows an example of an FTL information update during a program operation that jumps from one block to another (assuming page size is 2 kB). Figure 4.25(a) shows the current write pointer is at block 2 and page 63. Now the controller needs to write a new data pattern to the LBA starting from 2k in NAND Flash, where this LBA was previously stored at physical block 0 and page 5. Now the new data pattern for LBA 2k will be programmed to physical block 2 and page 63 where the pointer is currently located. The map will be updated to record this mapping. Then, the write pointer will need to move to a new “empty” block (e.g., physical block 1)’s page 0. Meanwhile, the block info table in FTL will update such information. For example, the valid page count in physical block 0 will reduce by 1 while in physical block 2 will increase by 1. Figure 4.25(b) shows the next step when the new data pattern for LBA 4k will be programmed to physical block 1 and page 0 where the pointer is currently located. The map will be updated to record this mapping. Meanwhile, the block info table in FTL will update such information. For example, the valid page count in physical block 0 will reduce by 1 while in physical block 0 will increase by 1. Since this is a new physical block that is being programmed, the indicator for “erased” will be labeled as false. Then, the write pointer will need to move to physical block 1 and page 1.

Figure 4.25 Example of FTL information update during a program operation that jumps from (a) the end of one block to (b) the beginning of another block.



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