CAN and FPGA Communication Engineering: Implementation of a CAN Bus based Measurement System on an FPGA Development Kit by Yu Zhu

Author:Yu Zhu [Zhu, Yu]
Language: eng
Format: epub
Tags: CAN, FPGA, UART, Microcontroller, Labview, Communication Engineering, Implementation
ISBN: 978-3-8428-1604-6
Publisher: Diplomica Verlag GmbH 2011
Published: 2012-02-09T00:00:00+00:00

Fig. 4.2 Underside (left) and top view (right) of the TDRB-HTG board [8]

In the experiments of this book three pins of J2 were used to make the serial communication for the FPGA. Table 4.1 lists the three pins with their functions.

Table 4.1 Pins applied for the FPGA

4.2 CAN MCU AT89C51CC03

As the FPGA does not offer any interface to the CAN bus and the CAN protocol is protected by patents, without a license from Bosch it is not allowed to program the FPGA directly with CAN. Therefore it is recommended to utilize an open-source protocol to read the output data from the FPGA first and then input them to the CAN bus. In this book an Atmel CAN MCU AT89C51CC03 with its mother board AT89STK-06 was applied as the third party to connect the communication for the FPGA and CAN bus. The AT89C51CC03 contains basic 8051 components, an additional CAN controller and so on (see below).

256 bytes of on-chip RAM

2048 bytes of on-chip ERAM

64K bytes of on-chip flash memory including 2K bytes flash for the Bootloader and 2K bytes EEPROM

Integrated Power Monitor to supervise internal power supply

14-sources 4-level interrupts

Three 16-bit Timers/Counters (T0, T1, T2)

32 I/O lines P0, P1, P2, P3, and 2 bits of P4

Five channels of 16-bit PCA with 8-bit PWM

Double Data Pointer

21-bit WatchDog Timer (7 programmable bits)

A 10-bit resolution analog to digital converter with 8 multiplexed inputs

X2 CORE (6 Clocks/machine cycle)

SPI interface

Full duplex UART

Full CAN controller

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