Quantum-Dot Cellular Automata Based Digital Logic Circuits: A Design Perspective by Trailokya Nath Sasamal & Ashutosh Kumar Singh & Anand Mohan

Author:Trailokya Nath Sasamal & Ashutosh Kumar Singh & Anand Mohan
Language: eng
Format: epub
ISBN: 9789811518232
Publisher: Springer Singapore

5.3 Full Adder Design with 5-Input Majority Gate

Existing 5-input majority gate designs have been studied in this section. Analyses are being carried out to find the best optimal and power-efficient design for 5-input majority voter gate (MV5), which can be used as an essential block of a full adder.

We have examined a novel adder circuit to evaluate the suitability of the most optimal MV5 gate. Figure 5.1 presents gate-level illustration of a full adder using 3-input majority voter (MV3), MV5 gates, and inverters. Given three inputs A, B, and C for a MV3 gate, Output Carry is presented by:

Fig. 5.1Gate-level diagram for full adder

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