Modern Computer Architecture and Organization by Jim Ledin

Modern Computer Architecture and Organization by Jim Ledin

Author:Jim Ledin
Language: eng
Format: epub
Publisher: Packt Publishing Pvt. Ltd.


SIMD processing

Processors that issue a single instruction, involving one or two data items, per clock cycle, are referred to as scalar processors. Processors capable of issuing multiple instructions per clock cycle, though not explicitly executing vector processing instructions, are called superscalar processors. Some algorithms benefit from explicitly vectorized execution, which means performing the same operation on multiple data items simultaneously. Processor instructions tailored to such tasks are called single instruction, multiple data (SIMD) instructions.

The simultaneously issued instructions in superscalar processors are generally performing different tasks on different data, representing a multiple instruction, multiple data (MIMD) parallel processing system. Some processing operations, such as the dot product operation used in digital signal processing described in Chapter 6, Specialized Computing Domains, perform the same mathematical operation on an array of values.

While the multiply-accumulate (MAC) operation described in Chapter 6, Specialized Computing Domains performs scalar mathematical operations on each pair of vector elements in sequence, it is also possible to implement processor hardware and instructions capable of performing similar operations on more than a single pair of numbers at one time.

In modern processors, SIMD instructions are available to perform tasks such as mathematics on numeric arrays, manipulation of graphics data, and substring searches in character strings.

The Intel implementation of Streaming SIMD Extensions (SSE) instructions, introduced in the Pentium III processors of 1999, provides a set of processor instructions and execution facilities for simultaneously operating on 128-bit data arrays. The data contained in the array can consist of integers or floating-point values. In the second generation of SSE (SSE2) instructions, the following data types can be processed in parallel:

Two 64-bit floating-point values

Four 32-bit floating-point values

Two 64-bit integer values

Four 32-bit integer values

Eight 16-bit integer values

Sixteen 8-bit integer values



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