Introduction to Embedded Systems by Manuel Jiménez Rogelio Palomera & Isidoro Couvertier

Author:Manuel Jiménez, Rogelio Palomera & Isidoro Couvertier
Language: eng
Format: epub
Publisher: Springer New York, New York, NY

7.1.3 Interrupt Service Sequence

The sequence of events taking place when an interrupt request is accepted by the CPU were outlined in Sect. 3.​9.​2. The same sequence is represented here, in a pictorial form in Fig. 7.1.

Fig. 7.1Sequence of events in the CPU upon accepting an interrupt request. a Stack before IRQ, b Stack after IRQ, c Stack after RETI

Steps 1 through 6, graphically denoted in the figure above are explained below. The stack and GIE operations are denoted in subgraphs (a), (b), and (c). A set GIE with is denoted with a checkmark, while a crossed-out GIE denotes it has been cleared.1.An interrupt request arrives while a main program, with GIE flag set, is executing instruction 53. Instruction 53 completes execution.

Download

Copyright Disclaimer:
This site does not store any files on its server. We only index and link to content provided by other sites. Please contact the content providers to delete copyright contents if any and email us, we'll remove relevant links or contents immediately.