Embedded Systems Architecture by Daniele Lacamera

Author:Daniele Lacamera
Language: eng
Format: epub
Tags: COM051060 - COMPUTERS / Programming Languages / C, COM051070 - COMPUTERS / Programming Languages / C++, COM046030 - COMPUTERS / Operating Systems / UNIX
Publisher: Packt Publishing
Published: 2018-06-06T07:06:38+00:00

When the conversion is completed, the corresponding discrete value is available on the lowest 12 bits of the data register, and can be returned to the caller:

return (int)(ADC1_DR);

}

The watchdog

Another common feature in many microcontrollers is the presence of a watchdog timer. A watchdog ensures that the system is not stuck within an endless loop or any other blocking situation within the code. This is particularly useful in bare-metal applications that rely on an event-driven loop, where calls are required not to block, and to return to the main event loop within the allowed amount of time.

The watchdog must be seen as the very last resort to recover an unresponsive system, by triggering a forced reboot regardless of the current state of the execution in the CPU.

The reference platform provides one independent watchdog timer, with a counter similar to those of the generic timers, with a 12-bit granularity and a prescaler factor. The prescaler of the watchdog, however, is expressed in multiples of 2, and has a range between 4 (represented by the value 0) and 256 (value 6).

The clock source is connected to a lower-speed oscillator, through an independent branch of the clock distribution. For this reason, the clock gating is not involved in the activation of this peripheral.

The watchdog configuration area is mapped within the peripherals address region, and consists of four registers:

The key register (offset 0), used to trigger the three operations unlock, start, and reset by writing predefined values in the lowest 16 bits

The prescale register (offset 4), to set the prescale factor of the counter

The reload register (offset 8), containing the reload value for the counter

The status register (offset 12), providing the status flags to synchronize the setup operations

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